1. Field of the Invention
The invention relates to the field of electrically programmable and erasable, non-volatile memory cells.
2. Prior Art
Non-volatile memory cells, particularly those employing charge storing regions such as floating gates, are well-known. The first commercial memories employed floating gate devices which are charged by avalanche injection, that is, by avalanching one of the two substrate regions associated with each of the cells. This type of device is described in U.S. Pat. No. 3,660,819. Subsequent memories used channel injection, that is, charge is injected from the channel of each cell into the floating gate. Such cells are described in U.S. Pat. No. 3,996,657 and 4,114,255. In some cases, the cells are both electrically programmable and electrically erasable and rely on tunneling for both programming and erasing, such as shown in U.S. Pat. No. 4,203,158.
Summaries of the various charging techniques used to program memory cells are described in "Nonavalanche Injection of Hot Electrons into SiO.sub.2 " by J. F. Verwey, Journal of Applied Physics, Volume 44, No. 6, June, 1973 beginning at page 2681 and "Hot-Electron Emission from Silicon into Silicon Dioxide" by T. H. Ning, Solid-State Electronics, 1978, Vol. 21, pages 273-282.
In prior art cells, each cell includes means for generating charge which can be trapped, for example, in a floating gate. The present invention departs from this approach by utilizing a single source of charge for programming a plurality of cells. In general, a charge disturbance or imbalance is created in the substrate and excess electrons are accelerated toward a selected cell in order to charge that cell.
Perhaps the closest prior art is described in "Electrically Programmable Non-volatile Semiconductor Memory" by Tarui, et al, Proceedings of the Fifth Conference (1973 International) on Solid-state Devices, Tokyo, 1973, supplement to the Journal of the Japan Society of Applied Physics, Volume 43, 1974. In FIG. 11 of this article, a device is shown which uses hot carrier injection from a forward biased pn junction and subsequent acceleration to charge a floating gate. However, unlike the present invention, no use is made of a single source of charge for a plurality of cells.